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This is a simple homebrew CPU which can be made with a minimum of parts. It is called CADET (Can't Add, Doesn't Even Try) after the IBM 1620 computer which also used lookup tables for addition and logical functions, rather than dedeicated circuitry.

The instruction set is minimal. There are eleven instructions in total:

        ADC - Add [X] with accumulator and carry
        COM - Complement Accumulator
        JMP - Load immedate to PC
        LDX - Load immediate to X register
        STC - Store accumulator to [X] and clear accumulator
        CLC - Clear carry flag
        FNZ - Set skip Flag if accumulator is non-zero
              Causes JMP instructions to be ignored
        CLS - Clear skip flag
        SET - Set carry flag
        AND - Logical AND [X] with accumulator
        HLT - Halt processor

        ADC, STC & AND increment the X register, which isn't restored.

This is covered in more detail in the simulator source code (below). The processor operates on a 16-bit accumulator and memory space, though it can easily be expanded to 32-bits or more. It does however, operate on four bits at a time and the memory bus is the same four bits. This is done so the finite state machine and addition/logic circutry can be crammed into a single 8kB ROM, hence its name.

Things to download:
Schematic (Page 1, PNG)
Schematic (Page 2, PNG)
Schematic (Page 1, PDF)
Schematic (Page 2, PDF)
FSM ROM assembly file (compiles with nasm)
FSM ROM Intel Hex file
macros.def Macro definitions for AS65 (6502 assembler)
bcd.asm converts a 16-bit binary number to a four digit BCD number
bcd.bin binary file for the simulator
CADETsim.c The CADET simulator. Compile and specify a binary image to execute. All of the above files in a single ZIP file (extracts to a subdirectory)